ESD and DRO cells

These two cells are user friendly cells, they don't use metal4. They follow standard cell rails.

DRO used up to metal3, composed by standard cell. So I will treat it as standard cell, I won't add any blockage,  any route_guide to it, I will let ICC to take care of everything. The only thing I need to take care is to make sure the cell is on the right row and make sure the hookup won't be messed up.

    metal1 is run all the way across the block, so no need to take care the

    To play safe which is not super necessary. create_preroute_via   from metal6 to metal3

ESD used up to metal2. Two set of pins, VDD/VSS and VDD_ESD/VSS_ESD, since there is only one set of VDD/VSS here, so the connect is simple. Here is the deal, pease ESD as standard cell, make sure it is on the right row. After all the conn

    metal1 rail is only on the boundary, so some trouble over there.

     create_preroute_via  from metal6 to metal2 for VDD_ESD and VSS_ESD

Found out no need to take care the connection from upper metal to lower metal, the tool is smart enough to take care of it by itself. Walla, ICC.

I still want to take care WPE for around these blocks.

Small problem, there is no odd width filler cell in daxing's script, this may create gap for power rail. The problem is not that small, need to tell him to fix it.